MC68EN360CAI25L Freescale Semiconductor, MC68EN360CAI25L Datasheet - Page 6

• Manufacturer Part Number: MC68EN360CAI25L
• Description: IC MPU QUICC 25MHZ 240-FQFP
• Manufacturer: Freescale Semiconductor
• Series: MC68000r

Specifications of MC68EN360CAI25L

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Core Size: 32 Bit
• Cpu Speed: 25MHz
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: FQFP
• No. Of Pins: 240
• Supply Voltage Range: 4.75V To 5.25V
• Rohs Compliant: Yes
• Family Name: M68xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

Table of Contents
Paragraph
Number
2.1.7.5
2.1.7.6
2.1.7.7
2.1.7.8
2.1.8
2.1.8.1
2.1.8.2
2.1.8.3
2.1.8.4
2.1.8.5
RO/CONFIG1/RAS2DD).2-9
2.1.9
2.1.9.1
2.1.9.2
2.1.9.3
2.1.9.4
2.1.10
2.1.10.1
2.1.10.2
2.1.10.3
2.1.10.4
2.1.11
2.1.11.1
2.1.11.2
2.1.11.3
2.1.11.4
2.1.11.5
2.1.12
2.1.12.1
2.1.12.2
2.1.12.3
2.1.12.4
2.1.12.5
2.1.12.6
2.1.13
2.1.14
2.1.14.1
2.1.14.2
2.1.14.3
2.1.14.4
2.1.14.5
2.2
2.3
ii
Transfer Size (SIZ1, SIZ0). ......................................................................2-8
Read/Write (R/W).....................................................................................2-8
Output Enable/Address Multiplex (OE/AMUX).........................................2-9
Byte Write Enable (WE3–WE0). ..............................................................2-9
Bus Arbitration Signals.............................................................................2-9
Bus Request (BR). ...................................................................................2-9
Bus Grant (BG). .......................................................................................2-9
Bus Grant Acknowledge (BGACK). .........................................................2-9
Read-Modify-Write Cycle/Initial Configuration (RMC/CONFIG0).............2-9
Bus Clear Out/Initial Configuration/Row Address Select Double-Drive (BCL-
System Control Signals..........................................................................2-10
Soft Reset (RESETS). ...........................................................................2-10
Hard Reset (RESETH)...........................................................................2-10
Halt (HALT). ...........................................................................................2-10
Bus Error (BERR). .................................................................................2-10
Clock Signals .........................................................................................2-10
System Clock Outputs (CLKO2–CLKO1). .............................................2-10
Crystal Oscillator (EXTAL, XTAL). .........................................................2-11
External Filter Capacitor (XFC)..............................................................2-11
Clock Mode Select (MODCK1–MODCK0).............................................2-11
Instrumentation and Emulation Signals .................................................2-11
Instruction Fetch/Development Serial Input (IFETCH/DSI)....................2-11
Instruction Pipe/Development Serial Output ( IPIPE0/DSO )...................2-11
Instruction Pipe/Row Address Select Double-Drive ( IPIPE1/RAS1DD ).2-11
Breakpoint/Development Serial clock (BKPT/DSCLK). .........................2-11
Freeze/Initial Configuration (FREEZE/CONFIG2). ................................2-12
Test Signals ...........................................................................................2-12
TRI-State Signal (TRIS). ........................................................................2-12
Test Reset (TRST).................................................................................2-12
Test Clock (TCK). ..................................................................................2-12
Test Mode Select (TMS). .......................................................................2-12
Test Data In (TDI). .................................................................................2-12
Test Data Out (TDO)..............................................................................2-12
Initial Configuration Pins (CONFIG).......................................................2-12
Power Signals ........................................................................................2-13
VCCSYN and GNDSYN.........................................................................2-13
VCCCLK and GNDCLK. ........................................................................2-13
GNDS1 and GNDS2. .............................................................................2-13
VCC and GND. ......................................................................................2-13
NC4–NC1...............................................................................................2-13
System Bus Signal Index in Slave Mode ...............................................2-14
On-Chip Peripherals Signal Index..........................................................2-15
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
Section 3
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