CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 100

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CP80617004119AES LBU3

Manufacturer Part Number
CP80617004119AES LBU3
Description
Manufacturer
Intel
Datasheet

Specifications of CP80617004119AES LBU3

Lead Free Status / RoHS Status
Compliant
1.9.21
1.9.22
100
C1DRB1 - Channel 1 DRAM Rank Boundary Address 1
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
The operation of this register is detailed in the description for register C0DRB0.
C1DRB2 - Channel 1 DRAM Rank Boundary Address 2
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
The operation of this register is detailed in the description for register C0DRB0.
15:10
15:10
9:0
9:0
Bit
Bit
Access
Access
RW-L
RW-L
RO
RO
000000b
000000b
Default
Default
Value
Value
000h
000h
Reserved
Channel 1 DRAM Rank Boundary Address 2 (C1DRBA2)
See C0DRB2.
This register is locked by Intel ME stolen Memory lock.
Reserved
Channel 1 DRAM Rank Boundary Address 1 (C1DRBA1)
See C0DRB1.
This register is locked by
Intel ME stolen Memory lock.
0/0/0/MCHBAR
602-603h
0000h
RO; RW-L
16 bits
0/0/0/MCHBAR
604-605h
0000h
RW-L; RO
16 bits
Processor Configuration Registers
Description
Description
Datasheet

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