CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 270
CP80617004119AES LBU3
Manufacturer Part Number
CP80617004119AES LBU3
Description
Manufacturer
Intel
Datasheet
1.CP80617004119AES_LBU3.pdf
(388 pages)
Specifications of CP80617004119AES LBU3
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270
33:32
31:16
15:0
Bit
Access
RW
W
W
Default
Value
0000h
0000h
0h
Domain-ID (DID)
Indicates the id of the domain whose context-entries needs
to be selectively invalidated. This field must be
programmed by software for both domain-selective and
device-selective invalidation requests.
The Capability register reports the domain-id width
supported by hardware. Software must ensure that the
value written to this field is within this limit. Hardware may
ignore and not implement Bits 15:N where N is the
supported domain-id width reported in the capability
register.
This field specifies which bits of the function number
portion (least significant three bits) of the SID field to
mask when performing device-selective invalidations.
The following encodings are defined for this field:
00: No bits in the SID field masked.
01: Mask most significant bit of function number in the
SID field.
10: Mask two most significant bit of function number in
the SID field.
11: Mask all three bits of function number in the SID field.
The device(s) specified through the FM and SID fields
must correspond to the domain-id specified in the DID
field.
Value returned on read of this field is undefined.
Indicates the source-id of the device whose corresponding
context-entry needs to be selectively invalidated. This field
along with the FM field must be programmed by software
for device-selective invalidation requests. Value returned
on read of this field is undefined.
Function Mask (FM)
Source ID (SID)
(Sheet 3 of 3)
Processor Configuration Registers
Description
Datasheet
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