CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 39

• Manufacturer Part Number: CP80617004119AES LBU3
• Manufacturer: Intel

Specifications of CP80617004119AES LBU3

• Lead Free Status / RoHS Status: Compliant

Processor Configuration Registers
1.3
1.3.1
Datasheet
Note:
Note:
Table 2.
Configuration Process and Registers
Platform Configuration Structure
The DMI physically connects the processor and the Intel PCH; so, from a configuration
standpoint, the DMI is logically PCI Bus 0. As a result, all devices internal to the
processor and the Intel PCH appear to be on PCI Bus 0.
The PCH internal LAN controller does not appear on Bus 0 - it appears on the external
PCI bus (whose number is configurable).
The system's primary PCI expansion bus is physically attached to the Intel PCH and,
from a configuration perspective, appears to be a hierarchical PCI bus behind a PCI-to-
PCI bridge and therefore has a programmable PCI Bus number. The PCI Express
Graphics Attach appears to system software to be a real PCI bus behind a PCI-to-PCI
bridge that is a device resident on PCI Bus 0.
A physical PCI bus 0 does not exist. DMI and the internal devices in the processor and
Intel PCH logically constitute PCI Bus 0 to configuration software. This is shown in the
following figure.
The processor contains three PCI devices within a single physical component. The
configuration registers for the three devices are mapped as devices residing on PCI Bus
0.
Device Number Assignment for Internal Processor Devices
Host Bridge/DRAM Controller
Host-to-PCI Express Bridge (virtual P2P)
Internal Graphics Device
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•
•
Device 0 Host Bridge/DRAM Controller. Logically this appears as a PCI device
residing on PCI Bus 0. Device 0 contains the standard PCI header registers, PCI
Express base address register, DRAM control (including thermal/throttling control),
configuration for the DMI, and other processor specific registers.
Device 1 Host-PCI Express Bridge. Logically this appears as a “virtual” PCI-to-PCI
bridge residing on PCI Bus 0 and is compliant with PCI Express Base Specification.
Device 1 contains the standard PCI-to-PCI bridge registers and the standard PCI
Express/PCI configuration registers (including the PCI Express memory address
mapping). It also contains Isochronous and Virtual Channel controls in the PCI
Express extended configuration space.
Device 2 Internal Graphics Device. Logically, this appears as an APCI device
residing on PCI Bus 0. Physically, Device 2 contains the configurations registers for
3D, 2D and display functions.
Processor Function
Device Number
Device 0
Device 1
Device 2
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