CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 170

• Manufacturer Part Number: CP80617004119AES LBU3
• Manufacturer: Intel

Specifications of CP80617004119AES LBU3

• Lead Free Status / RoHS Status: Compliant

1.13.25
170
PM_CAPID1 - Power Management Capabilities
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
31:27
24:22
18:16
15:8
7:0
Bit
26
25
21
20
19
Access
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Default
Value
000b
011b
19h
90h
01h
0b
0b
0b
0b
0b
PME Support (PMES)
This field indicates the power states in which this device may
indicate PME wake via PCI Express messaging. D0, D3hot &
D3cold. This device is not required to do anything to support
D3hot & D3cold, it simply must report that those states are
supported. Refer to the latest PCI Power Management
Specification for encoding explanation and other power
management details.
D2 Power State Support (D2PSS)
state is NOT supported.
D1 Power State Support (D1PSS)
state is NOT supported.
Auxiliary Current (AUXC)
auxiliary current requirements.
Device Specific Initialization (DSI)
device is NOT required before generic class device driver is
to use it.
Auxiliary Power Source (APS)
PME Clock (PMECLK)
PMEB generation.
PCI PM CAP Version (PCIPMCV)
Version - A value of 011b indicates that this function
complies with the latest revision of the PCI Power
Management Interface Specification.
Pointer to Next Capability (PNC)
This contains a pointer to the next item in the capabilities
list. If MSICH (CAPL[0] @ 7Fh) is 0, then the next item in
the capabilities list is the Message Signaled Interrupts (MSI)
capability at 90h. If MSICH (CAPL[0] @ 7Fh) is 1, then the
next item in the capabilities list is the PCI Express capability
at A0h.
Capability ID (CID)
Value of 01h identifies this linked list item (capability
structure) as being for PCI Power Management registers.
hard wired to 0 to indicate that the D2 power management
hard wired to 0 to indicate that the D1 power management
hard wired to 0 to indicate that there are no 3.3Vaux
hard wired to 0 to indicate that special initialization of this
hard wired to 0.
hard wired to 0 to indicate this device does NOT support
0/1/0/PCI
80-83h
C8039001h
RO
32 bits
Processor Configuration Registers
Description
Datasheet