CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 337

• Manufacturer Part Number: CP80617004119AES LBU3
• Manufacturer: Intel

Specifications of CP80617004119AES LBU3

• Lead Free Status / RoHS Status: Compliant

Processor Configuration Registers
Datasheet
5:0
Bit
Access
W
Default
Value
00h
The value in this field specifies the number of low order bits
of the ADDR field that must be masked for the invalidation
operation. Mask field enables software to request
invalidation of contiguous mappings for size-aligned
regions. For example:
Mask Value ADDR bits masked Pages invalidated:
Hardware implementations report the maximum supported
mask value through the Capability register.
Value returned on read of this field is undefined.
Address Mask (AM)
Value
Mask
(Sheet 2 of 2)
0
1
2
3
4
5
6
7
8
ADDR Bits
13:12
14:12
15:12
16:12
17:12
18:12
19:12
None
12
Description
Invalidated
Pages
128
256
512
16
32
64
1
2
8
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