CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 369
CP80617004119AES LBU3
Manufacturer Part Number
CP80617004119AES LBU3
Description
Manufacturer
Intel
Datasheet
1.CP80617004119AES_LBU3.pdf
(388 pages)
Specifications of CP80617004119AES LBU3
Lead Free Status / RoHS Status
Compliant
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Processor Configuration Registers
1.20.14
Datasheet
PMEN_REG - Protected Memory Enable Register
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
Register to enable the DMA-protected memory regions set up through the PLMBASE,
PLMLIMT, PHMBASE, PHMLIMIT registers. This register is always treated as RO (0) for
implementations not supporting protected memory regions (PLMR and PHMR fields
reported as 0 in the Capability register).
Protected memory regions may be used by software to securely initialize remapping
structures in memory.
30:1
Bit
31
Access
RW
RO
00000000h
Default
Value
0b
Enable Protected Memory Region (EPM)
0 = DMA accesses to protected memory regions are
1 = DMA accesses to protected memory regions are
If DMA remapping is not enabled, DMA requests to
protected memory regions are blocked. These DMA
requests are not recorded or reported as DMA-remapping
faults.
If DMA remapping is enabled, hardware may or may not
block DMA to the protected memory region(s). Software
must not depend on hardware protection of the protected
memory regions, and must ensure the DMA-remapping
structures are properly programmed to not allow DMA to
the protected memory regions.
Hardware reports the status of the protected memory
enable/disable operation through the PRS field in this
register. Hardware implementations supporting DMA
draining must drain any in-flight translated DMA requests
queued within the Root-Complex before indicating the
protected memory region as enabled through the PRS field.
Reserved
This field controls DMA accesses to the protected low-
memory and protected high memory regions.
• If DMA remapping is not enabled, DMA requests
• If DMA remapping is enabled, DMA requests are
0/2/0/GFXVTBAR
64-67h
00000000h
RO; RW
32 bits
(including those to protected regions) are not blocked.
translated per the programming of the DMA remapping
structures. Software may program the DMA-remapping
structures to allow or block DMA to the protected
memory regions.
(Sheet 1 of 2)
handled as follows:
handled as follows:
Description
369
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