CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 223
CP80617004119AES LBU3
Manufacturer Part Number
CP80617004119AES LBU3
Description
Manufacturer
Intel
Datasheet
1.CP80617004119AES_LBU3.pdf
(388 pages)
Specifications of CP80617004119AES LBU3
Lead Free Status / RoHS Status
Compliant
- Current page: 223 of 388
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Processor Configuration Registers
Datasheet
Header Type
Graphics
Translation Table,
Memory Mapped
Range Address
Graphics Memory
Range Address
I/O Base Address
Subsystem Vendor
Identification
Subsystem
Identification
Video BIOS ROM
Base Address
Capabilities Pointer
Interrupt Line
Interrupt Pin
Minimum Grant
Maximum Latency
Graphics Enhanced
Intel® SpeedStep
Technology
Capability
Processor Graphics
Control Register
Device Enable
Software Scratch
Read Write
Base of Stolen
Memory
Hardware Scratch
Read Write
Message Control
Message Address
Message Data
Register Name
INTRPIN
HDR2
GTTMMADR
GMADR
IOBAR
SVID2
SID2
ROMADR
CAPPOINT
INTRLINE
MINGNT
MAXLAT
GGCTL
MGGC
DEVEN
SSRW
BSM
HSRW
MC
MA
MD
Register
Symbol
E
10
18
20
2C
2E
30
34
3C
3D
3E
3F
4C
52
54
58
5C
60
92
94
98
Register
Start
(Sheet 2 of 3)
E
17
1F
23
2D
2F
33
34
3C
3D
3E
3F
4F
53
57
5B
5F
61
93
97
99
Register End
00h
000000000000
0004h
000000000000
000Ch
0000h
0000h
00000000h
90h
00h
01h
00h
003F003Fh
0030h
0000210Bh
00000000h
00000000h
0000h
0000h
Default Value
00000001h
00h
00000000h
0000h
RO
RO; RW
RO; RW-L; RW
RO; RW
RW-O
RW-O
RO
RO
RW
RO
RO
RO
RO
RO
RO
RW
RO
RW
RO; RW
RO; RW
RW
Access
223
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