CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 314
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CP80617004119AES LBU3
Manufacturer Part Number
CP80617004119AES LBU3
Description
Manufacturer
Intel
Datasheet
1.CP80617004119AES_LBU3.pdf
(388 pages)
Specifications of CP80617004119AES LBU3
Lead Free Status / RoHS Status
Compliant
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1.19.6
314
RTADDR_REG - Root-Entry Table Address Register
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
Register providing the base address of the root-entry table.
63:12
11:0
Bit
Access
RW
RO
00000000
Default
00000h
Value
000h
Root Table Address (RTA)
This register points to base of page aligned, 4-KB-sized
root-entry table in system memory. Hardware may ignore
and not implement Bits 63:HAW, where HAW is the host
address width.
Software specifies the base address of the root-entry table
through this register, and programs it in hardware through
the SRTP field in the Global Command register.
Reads of this register returns value that was last
programmed to it.
Reserved
0/0/0/DMIVC1REMAP
20-27h
0000000000000000h
RO; RW
64 bits
Processor Configuration Registers
Description
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