CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 247

• Manufacturer Part Number: CP80617004119AES LBU3
• Manufacturer: Intel

Specifications of CP80617004119AES LBU3

• Lead Free Status / RoHS Status: Compliant

Processor Configuration Registers
1.16.33
Datasheet
PMCS - Power Management Control/Status
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
14:13
12:9
7:2
2:0
Bit
Bit
15
8
Access
Access
RO
RO
RO
RO
RO
RO
Default
Default
Value
010b
Value
00b
00h
0b
0h
0b
Version (VER)
power management registers implemented and that this
device complies with revision 1.1 of the PCI Power
Management Interface Specification.
hard wired to 010b to indicate that there are 4 bytes of
RST/
PWR
Core
Core
Core
Core
Core
0/2/0/PCI
D4-D5h
0000h
RO; RW
16 bits
(Sheet 2 of 2)
PME Status (PMESTS)
This bit is 0 to indicate that IGD does not
support PME# generation from D3 (cold).
Data Scale (DSCALE)
The IGD does not support data register. This bit
always returns 00 when read, write operations
have no effect.
Data Select (DSEL)
The IGD does not support data register. This bit
always returns 0h when read, write operations
have no effect.
PME Enable (PME_EN)
This bit is 0 to indicate that PME# assertion
from D3 (cold) is disabled.
Reserved
Description
Description
247