CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 57

• Manufacturer Part Number: CP80617004119AES LBU3
• Manufacturer: Intel

Specifications of CP80617004119AES LBU3

• Lead Free Status / RoHS Status: Compliant

Processor Configuration Registers
1.8.13
Datasheet
MCHBAR - Processor Memory Mapped Register Range Base
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This is the base address for the processor Memory Mapped Configuration space. There
is no physical memory within this 16-KB window that can be addressed. The 16-KB
reserved by this register does not alias to any PCI 3.0-compliant memory mapped
space. On reset, the processor MMIO Memory Mapped Configuration space is disabled
and must be enabled by writing a 1 to MCHBAREN [Device 0, Offset48h, Bit 0]
All the bits in this register are locked in Intel TXT mode.
The register space contains memory control, initialization, timing, and buffer strength
registers; clocking registers; and power and thermal management registers. The 16KB
space reserved by the MCHBAR register is not accessible during Intel TXT mode of
operation or if the Intel® Management Engine (Intel® ME) security lock is asserted
(MESMLCK.ME_SM_lock at PCI Device 0, Function 0, Offset F4h) except for the
following offset ranges.
•
•
•
•
63:36
35:14
13:1
Bit
02B8h to 02BFh: Channel 0 Throttle Counter Status Registers
06B8h to 06BFh: Channel 1 Throttle Counter Status Registers
0CD0h to 0CFFh: Thermal Sensor Control Registers
3000h to 3FFFh: Unlocked registers for future expansion
Access
RW-L
RO
RO
0000000h
000000h
Default
Value
0000h
Reserved
Processor Memory Mapped Base Address (MCHBAR)
This field corresponds to Bits 35:14 of the base address
processor Memory Mapped configuration space. BIOS will
program this register resulting in a base address for a 16-
KB block of contiguous memory address space. This register
ensures that a naturally aligned 16-KB space is allocated
within the first 64 GB of addressable memory space.
System Software uses this base address to program the
processor Memory Mapped register set. All the bits in this
register are locked in Intel VT-d mode.
Reserved
0/0/0/PCI
48-4Fh
0000000000000000h
RW-L; RO
64 bits
(Sheet 1 of 2)
Description
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