CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 124

• Manufacturer Part Number: CP80617004119AES LBU3
• Manufacturer: Intel

Specifications of CP80617004119AES LBU3

• Lead Free Status / RoHS Status: Compliant

124
7:6
Bit
8
5
4
3
2
1
Access
RWC
RWC
RWC
RWC
RWC
RWC
RO
Default
Value
00b
0b
0b
0b
0b
0b
0b
Was Aux 0 Thermal Sensor Interrupt Event
(WA0TSIE)
0 = No trip for this event.
1 = An Aux0 Thermal Sensor trip occurred based on a higher
Software must write a 1 to clear this status bit.
Reserved
Catastrophic Thermal Sensor Interrupt Event (CTSIE)
0 = No trip for this event.
1 = A Catastrophic Thermal Sensor trip event occurred
Software must write a 1 to clear this status bit.
Hot Thermal Sensor Interrupt Event (HTSIE)
0 = No trip for this event.
1 = A Hot Thermal Sensor trip event occurred based on a
Software must write a 1 to clear this status bit.
Aux 3 Thermal Sensor Interrupt Event (A3TSIE)
0 = No trip for this event.
1 = An Aux3 Thermal Sensor trip event occurred based on a
Software must write a 1 to clear this status bit.
Aux 2 Thermal Sensor Interrupt Event (A2TSIE)
0 = No trip for this event.
1 = Indicates that an Aux2 Thermal Sensor trip event
Software must write a 1 to clear this status bit.
Aux 1 Thermal Sensor Interrupt Event (A1TSIE)
0 = No trip for this event.
1 = Indicates that an Aux1 Thermal Sensor trip event
Software must write a 1 to clear this status bit.
to lower temperature transition through the trip point.
based on a lower to higher temperature transition
through the trip point.
lower to higher temperature transition through the trip
point.
lower to higher temperature transition through the trip
point.
occurred based on a lower to higher temperature
transition thru the trip point.
occurred based on a lower to higher temperature
transition thru the trip point.
(Sheet 2 of 3)
Processor Configuration Registers
Description
Datasheet