CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 255

• Manufacturer Part Number: CP80617004119AES LBU3
• Manufacturer: Intel

Specifications of CP80617004119AES LBU3

• Lead Free Status / RoHS Status: Compliant

Processor Configuration Registers
1.18.2
Datasheet
CAP_REG - Capability Register
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
Register to report general DMA remapping hardware capabilities.
63:56
53:48
47:40
Bit
55
54
39
38
Access
RO
RO
RO
RO
RO
RO
RO
001001b
0000000
Default
Value
00h
1b
1b
0b
1b
0b
Reserved
DMA Read Draining (DRD)
0 = On IOTLB invalidations, hardware does not support
1 = On IOTLB invalidations, hardware supports draining of
Indicates supported architecture version.
DMA Write Draining (DWD)
0 = On IOTLB invalidations, hardware does not support
1 = On IOTLB invalidations, hardware supports draining of
Maximum Address Mask Value (MAMV)
The value in this field indicates the maximum supported value
for the Address Mask (AM) field in the Invalidation Address
(IVA_REG) register.
Number of Fault-recording Registers (NFR)
This field indicates a value of N-1, where N is the number of
fault recording registers supported by hardware.
Implementations must support at least one fault recording
register (NFR = 0) for each DMA-remapping hardware unit in
the platform.
The maximum number of fault recording registers per DMA-
remapping hardware unit is 256.
Bit 40 in the capability register is the least significant bit of the
NFR field (47:40).
Page Selective Invalidation Support (PSI)
0 = Indicates that the DMAr engine does not support page
1 = Indicates the DMAr engine does support page-selective
Reserved
draining of translated DMA read requests queued within
the root complex.
translated DMA read requests queued within the root
complex.
draining of translated DMA writes queued within the root
complex.
translated DMA writes queued within the root complex.
selective invalidations.
IOTLB invalidations. The MAMV field indicates the
maximum number of contiguous translations that may be
invalidated in a single request.
0/0/0/VC0PREMAP
8-Fh
00C9008020630272h
RO
64 bits
(Sheet 1 of 4)
Description
255