CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 362

• Manufacturer Part Number: CP80617004119AES LBU3
• Manufacturer: Intel

Specifications of CP80617004119AES LBU3

• Lead Free Status / RoHS Status: Compliant

362
33:32
31:16
15:0
Bit
Access
RW
RO
RO
Default
Value
0000h
0000h
00b
Function Mask (FM)
This field specifies which bits of the function number portion
(least significant three bits) of the SID field to mask when
performing device-selective invalidations.
The following encodings are defined for this field:
00:
01:
SID field.
10:
the SID field.
11:
The device(s) specified through the FM and SID fields must
correspond to the domain-ID specified in the DID field.
Value returned on read of this field is undefined.
Source-ID (SID)
Indicates the source-id of the device whose corresponding
context-entry needs to be selectively invalidated. This field
along with the FM field must be programmed by software for
device-selective invalidation requests.
Value returned on read of this field is undefined.
Domain-ID (DID)
Indicates the ID of the domain whose context-entries need
to be selectively invalidated. This field must be programmed
by software for both domain-selective and device-selective
invalidation requests.
The Capability register reports the domain-id width
supported by hardware. Software must ensure that the
value written to this field is within this limit.
Hardware ignores (and may not implement) bits 15:N where
N is the supported domain-id width reported in the
capability register.
(Sheet 3 of 3)
No bits in the SID field masked.
Mask most significant bit of function number in the
Mask two most significant bit of function number in
Mask all three bits of function number in the SID field.
Processor Configuration Registers
Description
Datasheet