CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 181

• Manufacturer Part Number: CP80617004119AES LBU3
• Manufacturer: Intel

Specifications of CP80617004119AES LBU3

• Lead Free Status / RoHS Status: Compliant

Processor Configuration Registers
1.13.38
Datasheet
LCAP - Link Capabilities
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
Indicates PCI Express device specific capabilities.
31:24
23:22
Bit
Bit
2
1
0
Access
Access
RWC
RWC
RWC
RO
RO
Default
Default
Value
Value
02h
00b
0b
0b
0b
Port Number (PN)
Indicates the PCI Express port number for the given PCI
Express link. Matches the value in Element Self
Description[31:24].
Reserved
Fatal Error Detected (FED)
When set this bit indicates that fatal error(s) were
detected. Errors are logged in this register regardless of
whether error reporting is enabled or not in the Device
Control register. When Advanced Error Handling is
enabled, errors are logged in this register regardless of
the settings of the uncorrectable error mask register.
Non-Fatal Error Detected (NFED)
When set this bit indicates that non-fatal error(s) were
detected. Errors are logged in this register regardless of
whether error reporting is enabled or not in the Device
Control register.
When Advanced Error Handling is enabled, errors are
logged in this register regardless of the settings of the
uncorrectable error mask register.
Correctable Error Detected (CED)
When set this bit indicates that correctable error(s) were
detected. Errors are logged in this register regardless of
whether error reporting is enabled or not in the Device
Control register.
When Advanced Error Handling is enabled, errors are
logged in this register regardless of the settings of the
correctable error mask register.
0/1/0/PCI
AC-AFh
02214D02h
RO; RW-O
32 bits
(Sheet 2 of 2)
(Sheet 1 of 4)
Description
Description
181