CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 209

• Manufacturer Part Number: CP80617004119AES LBU3
• Manufacturer: Intel

Specifications of CP80617004119AES LBU3

• Lead Free Status / RoHS Status: Compliant

Processor Configuration Registers
Datasheet
30:26
Bit
Access
RW
Default
10000b
Value
Transmit De-emphasis For Gen2 (TXDGEN2SEL)
Default of TXDGEN2LSEL and TXDGEN2LDRVEN
provides -6dB of de-emphasis. The following are the
production settings:
(Sheet 2 of 4)
Input Code
00000b
00001b
00010b
00011b
00100b
00101b
00110b
00111b
01000b
01001b
01010b
01011b
01100b
01101b
01110b
01111b
10000b
10001b
10010b
10011b
10100b
10101b
10110b
10111b
11000b
11001b
11010b
11011b
11100b
11101b
11110b
11111b
De-emphasis
0dB
-0.37dB
-0.76dB
-1.16dB
-1.58dB
-2.03dB
-2.50dB
-3.00dB
-2.03dB
-2.50dB
-3.00dB
-3.52dB
-4.08dB
-4.68dB
-5.33dB
-6.02dB
-6.02dB
-6.78dB
-7.60dB
-8.52dB
-9.54dB
-10.70dB
-12.04dB
-13.62dB
-10.70dB
-12.04dB
-13.62dB
-15.56dB
-18.06dB
-21.58dB
-27.60dB
N/A
Description
Gen1 Default
Notes
Gen2 Default
No de-emphasis
Not Valid
209