CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 229

• Manufacturer Part Number: CP80617004119AES LBU3
• Manufacturer: Intel

Specifications of CP80617004119AES LBU3

• Lead Free Status / RoHS Status: Compliant

Processor Configuration Registers
1.16.6
Datasheet
CC - Class Code
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register contains the device programming interface information related to the Sub-
Class Code and Base Class Code definition for the IGD. This register also contains the
Base Class Code and the function sub-class in relation to the Base Class Code.
23:16
15:8
7:0
Bit
Access
RO
RO
RO
Default
Value
03h
00h
00h
Base Class Code (BCC)
This is an 8-bit value that indicates the base class code for
the processor. This code has the value 03h, indicating a
Display Controller.
When MCHBAR Offset 44 Bit 31 is 0 this code has the value
03h, indicating a Display Controller.
When MCHBAR Offset 44 Bit 31 is 1 this code has the value
04h, indicating a Multimedia Device.
Sub-Class Code (SUBCC)
When MCHBAR Offset 44 Bit 31 is 0 this value is determined
based on Device 0 GGC register, GMS and IVD fields.
When MCHBAR offset 44 bit 31 is 1 this value is 80h,
indicating other multimedia device.
Programming Interface (PI)
When MCHBAR Offset 44 Bit 31 is 0 this value is 00h,
indicating a Display Controller.
When MCHBAR Offset 44 Bit 31 is 1 this value is 00h,
indicating a NOP.
00h: VGA compatible
80h: Non VGA (GMS = “0000” or IVD = “1”)
0/2/0/PCI
9-Bh
030000h
RO
24 bits
Description
229