CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 8

• Manufacturer Part Number: CP80617004119AES LBU3
• Manufacturer: Intel

Specifications of CP80617004119AES LBU3

• Lead Free Status / RoHS Status: Compliant

1.18.11FEADDR_REG - Fault Event Address Register ............................................ 275
1.18.12FEUADDR_REG - Fault Event Upper Address Register................................. 276
1.18.13AFLOG_REG - Advanced Fault Log Register .............................................. 276
1.18.14PMEM_REG - Protected Memory Enable Register ....................................... 278
1.18.15PLMBASE_REG - Protected Low-Memory Base Register .............................. 279
1.18.16PLMLIMIT_REG - Protected Low-Memory Limit Register .............................. 280
1.18.17PHMBASE_REG - Protected High-Memory Base Register ............................. 281
1.18.18PHMLIMIT_REG - Protected High-Memory Limit Register ............................ 282
1.18.19IQH_REG - Invalidation Queue Head Register ........................................... 283
1.18.20IQT_REG - Invalidation Queue Tail Register.............................................. 283
1.18.21IQA_REG - Invalidation Queue Address Register ....................................... 284
1.18.22ICS_REG - Invalidation Completion Status Register ................................... 284
1.18.23IECTL_REG - Invalidation Event Control Register....................................... 285
1.18.24IEDATA_REG - Invalidation Event Data Register........................................ 286
1.18.25IEADDR_REG - Invalidation Event Address Register ................................... 286
1.18.26IEUADDR_REG - Invalidation Event Upper Address Register........................ 287
1.18.27IRTA_REG - Interrupt Remapping Table Address Register ........................... 287
1.18.28IVA_REG - Invalidate Address Register .................................................... 288
1.18.29IOTLB_REG - IOTLB Invalidate Register ................................................... 290
1.18.30FRCD_REG - Fault Recording Registers .................................................... 293
1.18.31VTCMPLRESR - VT-d Completion Resource Dedication ................................ 294
1.18.32VTFTCHARBCTL - VC0/VCp Intel VT-d Fetch Arbiter Control ........................ 297
1.18.33PEGVTCMPLRESR - PEG VT-d Completion Resource Dedication .................... 298
1.19
DMI VC1 REMAP Registers ................................................................................ 300
1.19.1 VER_REG - Version Register ................................................................... 302
1.19.2 CAP_REG - Capability Register................................................................ 302
1.19.3 ECAP_REG - Extended Capability Register ................................................ 306
1.19.4 GCMD_REG - Global Command Register................................................... 308
1.19.5 GSTS_REG - Global Status Register......................................................... 312
1.19.6 RTADDR_REG - Root-Entry Table Address Register .................................... 314
1.19.7 CCMD_REG - Context Command Register................................................. 315
1.19.8 FSTS_REG - Fault Status Register ........................................................... 318
1.19.9 FECTL_REG - Fault Event Control Register................................................ 320
1.19.10FEDATA_REG - Fault Event Data Register ................................................. 322
1.19.11FEADDR_REG - Fault Event Address Register ............................................ 322
1.19.12FEUADDR_REG - Fault Event Upper Address Register................................. 323
1.19.13AFLOG_REG - Advanced Fault Log Register .............................................. 323
1.19.14PMEN_REG - Protected Memory Enable Register........................................ 324
1.19.15PLMBASE_REG - Protected Low-Memory Base Register .............................. 326
1.19.16PLMLIMIT_REG - Protected Low-Memory Limit Register .............................. 327
1.19.17PHMBASE_REG - Protected High-Memory Base Register ............................. 328
1.19.18PHMLIMIT_REG - Protected High-Memory Limit Register ............................ 329
1.19.19IQH_REG - Invalidation Queue Head Register ........................................... 330
1.19.20IQT_REG - Invalidation Queue Tail Register.............................................. 330
1.19.21IQA_REG - Invalidation Queue Address Register ....................................... 331
1.19.22ICS_REG - Invalidation Completion Status Register ................................... 332
1.19.23IECTL_REG - Invalidation Event Control Register....................................... 332
1.19.24IEDATA_REG - Invalidation Event Data Register........................................ 333
1.19.25IEADDR_REG - Invalidation Event Address Register ................................... 334
1.19.26IEUADDR_REG - Invalidation Event Upper Address Register........................ 334
1.19.27IRTA_REG - Interrupt Remapping Table Address Register ........................... 335
1.19.28IVA_REG - Invalidate Address Register .................................................... 336
1.19.29IOTLB_REG - IOTLB Invalidate Register ................................................... 338
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Datasheet