CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 355
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CP80617004119AES LBU3
Manufacturer Part Number
CP80617004119AES LBU3
Description
Manufacturer
Intel
Datasheet
1.CP80617004119AES_LBU3.pdf
(388 pages)
Specifications of CP80617004119AES LBU3
Lead Free Status / RoHS Status
Compliant
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Processor Configuration Registers
Datasheet
Bit
28
27
26
Access
RO
RO
W
Default
Value
0b
0b
0b
Enable Advanced Fault Logging (EAFL)
This field is valid only for implementations supporting
advanced fault logging.
Software writes to this field to request hardware to enable
or disable advanced fault logging.
0 = Disable advanced fault logging. In this case, translation
1 = Enable use of memory-resident fault log.
When enabled, translation faults are recorded in the
memory-resident log. The fault log pointer must be set in
hardware (through SFL field) before enabling advanced fault
logging.
Hardware reports the status of the advanced fault logging
enable operation through the AFLS field in the Global Status
register.
Value returned on read of this field is undefined.
Write Buffer Flush (WBF)
This bit is valid only for implementations requiring write
buffer flushing.
Software sets this field to request hardware to flush the
root-complex internal write buffers. This is done to ensure
any updates to the memory-resident remapping structures
are not held in any internal write posting buffers.
Refer to Section 11.1 for details on write-buffer flushing
requirements.
Hardware reports the status of the write buffer flushing
operation through the WBFS field in the Global Status
register.
Clearing this bit has no effect.
Value returned on read of this field is undefined.
Queued Invalidation Enable (QIE)
This field is valid only for implementations supporting
queued invalidations.
Software writes to this field to enable or disable queued
invalidations.
0 = Disable queued invalidations.
1 = Enable use of queued invalidations.
Hardware reports the status of queued invalidation enable
operation through QIES field in the Global Status register.
Refer to Section 6.2.2 for software requirements for
enabling/disabling queued invalidations.
The value returned on a read of this field is undefined.
faults are reported through the Fault Recording
registers.
(Sheet 3 of 5)
Description
355
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