CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 121

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CP80617004119AES LBU3

Manufacturer Part Number
CP80617004119AES LBU3
Description
Manufacturer
Intel
Datasheet

Specifications of CP80617004119AES LBU3

Lead Free Status / RoHS Status
Compliant
Processor Configuration Registers
1.10.7
Datasheet
TSTTPB1 - Thermal Sensor Temperature Trip Point B1
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register sets the target values for some of the trip points in the Thermometer
mode. See also TSTTPA1.
31:24
23:16
15:8
7:0
Bit
Access
RW-L
RW-L
RW-L
RW-L
Default
Value
00h
00h
00h
00h
Aux 3 Trip Point Setting (A3TPS)
Sets the target value for the Aux3 trip point Lockable by
TSTTPA1[31].
Aux 2 Trip Point Setting (A2TPS)
Sets the target value for the Aux2 trip point Lockable by
TSTTPA1[31].
Aux 1 Trip Point Setting (A1TPS)
Sets the target value for the Aux1 trip point Lockable by
TSTTPA1[31].
Aux 0 Trip Point Setting (A0TPS)
Sets the target value for the Aux0 trip point Lockable by
TSTTPA1[31].
0/0/0/MCHBAR
1014-1017h
00000000h
RW-L
32 bits
Description
121

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