CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 156

• Manufacturer Part Number: CP80617004119AES LBU3
• Manufacturer: Intel

Specifications of CP80617004119AES LBU3

• Lead Free Status / RoHS Status: Compliant

1.13.5
156
RID1 - Revision Identification
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register contains the revision number of the processor. The Revision ID (RID) is a
traditional 8-bit Read Only (RO) register located at offset 08h in the standard PCI
header of every PCI/PCI Express compatible device and function.
Following reset, the SRID is returned when the RID is read at offset 08h. The SRID
value reflects the actual product stepping. To select the CRID value, BIOS/configuration
software writes a key value of 69h to Bus 0, Device 0, Function 0 (DMI device) of the
CPU’s RID register at offset 08h. This causes the CRID to be returned when the RID is
read at offset 08h.
Stepping Revision ID (SRID)
This register contains the revision number of the CPU.
The SRID is a 8-bit hardwired value assigned by Intel, based on product’s stepping. The
SRID is not a directly addressable PCI register. The SRID value is reflected through the
RID register when appropriately addressed.
Compatible Revision ID (CRID)
The CRID is an 8-bit hardwired value assigned by Intel during manufacturing process.
Normally, the value assigned as the CRID will be identical to the SRID value of a
previous stepping of the product with which the new product is deemed “compatible”.
The CRID is not a directly addressable PCI register. The CRID value is reflected through
the RID register when appropriately addressed.
7:0
Bit
Access
RO
Default
Value
10h
Revision Identification Number (RID1)
This is an 8-bit value that indicates the revision identification
number for the processor Device 0. For the C-2 Stepping,
these values are:
SRID = 12h
CRID = 02h
0/1/0/PCI
8h
12h
RO
8 bits
Processor Configuration Registers
Description
Datasheet