CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 141

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CP80617004119AES LBU3

Manufacturer Part Number
CP80617004119AES LBU3
Description
Manufacturer
Intel
Datasheet

Specifications of CP80617004119AES LBU3

Lead Free Status / RoHS Status
Compliant
Processor Configuration Registers
1.10.24
1.10.25
Datasheet
MTDPCTLAUXTNTINT - Memory TDP Controller Aux and
Throttle-NonThrottle Intervals
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
MTDPCMISC - Memory TDP Controller Miscellaneous
Control
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
31:24
23:20
19:16
15:10
31:24
23:19
9:8
7:0
Bit
Bit
18
17
16
15
14
13
Access
Access
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RO
RO
RO
RO
Default
Default
Value
Value
00h
00h
00b
00h
00h
00h
0h
0h
0b
0b
0b
0b
0b
0b
Reserved
Reserved
Reserved
Reserved
Memory Interface Throttling Plus Non Throttling
Interval (MITNTInt)
00: 32 mb4clks
01:64 mb4clks
10: 128 mb4clks
11: 256 mb4clks
Reserved
Memory IFC Thermal Weight Counter Read Out
(MTWCRO)
This field reports the current value of the selected
thermal weight counter bits.
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
0/0/0/MCHBAR
308-30Bh
00000000h
32 bits
0/0/0/MCHBAR
30C-30Fh
00000000h
32 bits
RW; RO
RW; RO
(Sheet 1 of 2)
Description
Description
141

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