CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 222

• Manufacturer Part Number: CP80617004119AES LBU3
• Manufacturer: Intel

Specifications of CP80617004119AES LBU3

• Lead Free Status / RoHS Status: Compliant

1.15.13
1.16
222
Vendor
Identification
Device
Identification
PCI Command
PCI Status
Revision
Identification
Class Code
Cache Line Size
Master Latency
Timer
Register Name
DMILSTS - DMI Link Status
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
Indicates DMI status.
PCI Device 2 Function 0
15:10
9:4
3:0
Bit
VID2
DID2
PCICMD2
PCISTS2
RID2
CC
CLS
MLT2
Register
Symbol
Access
RO
RO
RO
Default
Value
0
2
4
6
8
9
C
D
00h
00h
1h
Register
Start
(Sheet 1 of 3)
Reserved
Negotiated Width (NWID)
Indicates negotiated link width. This field is valid only when
the link is in the L0, L0s, or L1 states (after link width
negotiation is successfully completed).
All other encodings are reserved.
Negotiated Speed (NSPD)
Indicates negotiated link speed.
All other encodings are reserved.
00h: Reserved
01h: X1
02h: X2
04h: X4
1h:
0/0/0/DMIBAR
8A-8Bh
0001h
RO
16 bits
1
3
5
7
8
B
C
D
Register End
2.5 Gb/s
Processor Configuration Registers
Description
Default Value
8086h
0046h
0000h
0090h
12h
030000h
00h
00h
RO
RO
RO; RW
RO
RO
RO
RO
RO
Access
Datasheet