CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 43

• Manufacturer Part Number: CP80617004119AES LBU3
• Manufacturer: Intel

Specifications of CP80617004119AES LBU3

• Lead Free Status / RoHS Status: Compliant

Processor Configuration Registers
1.5.1
Datasheet
Figure 10. Processor Configuration Cycle Flow Chart
Internal Device Configuration Accesses
The processor decodes the Bus Number (Bits 23:16) and the Device Number fields of
the CONFIG_ADDRESS register. If the Bus Number field of CONFIG_ADDRESS is 0 the
configuration cycle is targeting a PCI Bus 0 device.
If the targeted PCI Bus 0 device exists in the processor and is not disabled, the
configuration cycle is claimed by the appropriate device.
Pro ce sso r Ge n e ra te s
cycle to g o to D M I
re su ltin g in M a ste r
Pro ce sso r a llo w s
Typ e 1 Acce ss
D e vice # = 0
to PC I Exp re ss
Ab o rt
N o
Ye s
Ye s
Ye s
Pro ce sso r Ge n e ra te s
Pro ce sso r G e n e ra te s
C O N FIG _ AD D R ESS
SEC O N D AR Y BU S
C o n fig u ra tio n C ycle
I/O R e a d/W rite to
Bu s # > SEC BU S
Bu s#  SU B BU S
C ON FIG_ D ATA
D W I/O W rite to
w ith b it 3 1 = 1
Typ e 0 Acce ss
to PC I Exp re ss
En a b le d &
En a b le d &
D M I Typ e 1
in Bu s 0
in Bu s 0
D e v # 1
Bu s # = 0
D e v # 1
Bu s# =
D e v 1
D e v 1
N o
N o
N o
Ye s
Pro ce sso r Ge n e ra te s
C o n fig u ra tio n C ycle s
D e v # 1 En a b le d
D e v # 2 En a b le d
& Fu n ctio n # = 0
& Fu n ctio n # = 0
D e vice # = 1 &
D e vice # = 2 &
D e vice # = 0 &
Fu n ctio n # = 0
D M I Typ e0
N o
N o
N o
Ye s
Ye s
Ye s
Pro ce sso r
Pro ce sso r
Pro ce sso r
C la im s
C la im s
C la im s
43