CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 119

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CP80617004119AES LBU3

Manufacturer Part Number
CP80617004119AES LBU3
Description
Manufacturer
Intel
Datasheet

Specifications of CP80617004119AES LBU3

Lead Free Status / RoHS Status
Compliant
Processor Configuration Registers
1.10.4
1.10.5
Datasheet
TOF1 - Thermometer Offset 1
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register is used for programming the thermometer offset.
RTR1 - Relative Thermometer Read 1
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register contains the relative temperature.
7:0
7:0
Bit
Bit
Access
Access
RW
RO
Default
Default
Value
Value
00h
00h
Thermometer Offset (TOF)
This value is used to adjust the current thermometer reading
so that the TR value is not relative to a specific trip or
calibration point, and is positive going for positive increases in
temperature. The initial default value is 00h and software
must determine the correct temperature adjustment that
corresponds to a zero reading by reading the fuses and
referring to the temperature tables, and then programming
the computed offset into this register.
Relative Thermometer Reading (RTR1)
In Thermometer mode, this register reports the relative
temperature of the thermal sensor. Provides a two's
complement value of the thermal sensor relative to TOF.
TR and HTPS can both vary between 0 and 255. RTR1=
TR+TOF.
See also TSS [Thermometer mode Output Valid]
In the Analog mode, the RTR field reports HTPS value.
0/0/0/MCHBAR
1007h
00h
RW
8 bits
0/0/0/MCHBAR
1008h
00h
RO
8 bits
Description
Description
119

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