CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 82

• Manufacturer Part Number: CP80617004119AES LBU3
• Manufacturer: Intel

Specifications of CP80617004119AES LBU3

• Lead Free Status / RoHS Status: Compliant

82
1:0
Bit
3
2
Access
RW-L
RW-L
RO
Default
Value
0b
0b
0h
Channel 1 Enhanced Mode (CH1_ENHMODE)
This bit indicates that enhanced addressing mode of
operation is enabled for channel 1.
Enhanced addressing mode of operation should be enabled
only when both the channels are equally populated with
same size and same type of DRAM memory.
An added restriction is that the number of ranks/channel
has to be 1, 2 or 4.
Note: If any of the channels is in enhanced mode, the other
channel should also be in enhanced mode.
This register is locked by Intel ME stolen Memory lock.
Channel 0 Enhanced Mode (CH0_ENHMODE)
This bit indicates that enhanced addressing mode of
operation is enabled for Channel 0.
Enhanced addressing mode of operation should be enabled
only when both the channels are equally populated with
same size and same type of DRAM memory.
An added restriction is that the number of ranks/channel
has to be 1, 2 or 4.
Note: If any of the two channels is in enhanced mode, the
other channel should also be in enhanced mode.
This register is locked by Intel ME stolen Memory lock.
Reserved
(Sheet 2 of 2)
Encoding
Encoding
0b
1b
0b
1b
Processor Configuration Registers
Description
Standard addressing
Enhanced addressing
Standard addressing
Enhanced addressing
Description
Description
Datasheet