CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 73

• Manufacturer Part Number: CP80617004119AES LBU3
• Manufacturer: Intel

Specifications of CP80617004119AES LBU3

• Lead Free Status / RoHS Status: Compliant

Processor Configuration Registers
1.8.26
1.8.27
Datasheet
PBFC - Primary Buffer Flush Control
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
SBFC - Secondary Buffer Flush Control
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
31:1
31:1
Bit
Bit
0
0
Access
Access
RO
RO
W
W
00000000h Reserved
00000000h
Default
Default
Value
Value
0b
0b
These bits must remain reserved to avoid a potential hang
condition.
Secondary CWB Flush Control (SCWBFLSH)
A CPU write to this bit flushes the SCWB of all writes.
The data associated with the write to this register is
discarded.
Reserved
These bits must remain reserved to avoid a potential hang
condition.
Primary CWB Flush Control (PCWBFLSH)
A CPU write to this bit flushes the PCWB of all writes.
The data associated with the write to this register is
discarded.
Note: The write completion indication can be returned before
the flush has finished
0/0/0/PCI
C0-C3h
00000000h
RO; W
32 bits
0/0/0/PCI
C4-C7h
00000000h
RO; W
32 bits
Description
Description
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