CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 84

• Manufacturer Part Number: CP80617004119AES LBU3
• Manufacturer: Intel

Specifications of CP80617004119AES LBU3

• Lead Free Status / RoHS Status: Compliant

1.9.4
1.9.5
84
C0DRB1 - Channel 0 DRAM Rank Boundary Address 1
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
See C0DRB0.
C0DRB2 - Channel 0 DRAM Rank Boundary Address 2
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
See C0DRB0.
15:10
15:10
9:0
Bit
9:0
Bit
Access
Access
RW-L
RW-L
RO
RO
Default
Default
Value
Value
000h
000h
00h
00h
Reserved
Channel 0 DRAM Rank Boundary Address 2 (C0DRBA2)
This register defines the DRAM rank boundary for Rank 2 of
Channel 0 (64-MB granularity) = (R2 + R1 + R0)
R0 = Total Rank 0 memory size/64 MB
R1 = Total Rank 1 memory size/64 MB
R2 = Total Rank 2 memory size/64 MB
R3 = Total Rank 3 memory size/64 MB
This register is locked by Intel ME stolen Memory lock.
Reserved
Channel 0 DRAM Rank Boundary Address 1 (C0DRBA1)
This register defines the DRAM rank boundary for Rank 1 of
Channel 0 (64-MB granularity) = (R1 + R0)
R0 = Total Rank 0 memory size/64 MB
R1 = Total Rank 1 memory size/64 MB
R2 = Total Rank 2 memory size/64 MB
R3 = Total Rank 3 memory size/64 MB
This register is locked by Intel ME stolen Memory lock.
0/0/0/MCHBAR
202-203h
0000h
RW-L; RO
16 bits
0/0/0/MCHBAR
204-205h
0000h
RO; RW-L
16 bits
Processor Configuration Registers
Description
Description
Datasheet