CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 297

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CP80617004119AES LBU3

Manufacturer Part Number
CP80617004119AES LBU3
Description
Manufacturer
Intel
Datasheet

Specifications of CP80617004119AES LBU3

Lead Free Status / RoHS Status
Compliant
Processor Configuration Registers
1.18.32
Datasheet
VTFTCHARBCTL - VC0/VCp Intel VT-d Fetch Arbiter Control
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register controls the relative grant count given to each of the DMI VC0, DMI VC1
and PEG VC0 VT-d fetch requests.
31:16
15:12
11:8
7:4
3:0
Bit
Access
RW-L
RW-L
RW-L
RW-L
RW-L
Default
Value
0000h
Fh
Fh
Fh
Fh
Intel Reserved
Intel Reserved
PEG VC0 VT-d Fetch Grant Count (PEGVC0GNTCNT)
The arbiter will continue to grant PEG VC0 VT-d fetch as long
as the grant count value in this field is greater than zero.
DMI VCp VT-d Fetch Grant Count (DMIVCPGNTCNT)
The arbiter will continue to grant DMI VCp VT-d fetch as long
as the grant count value in this field is greater than zero and
there is no higher priority VT-d fetch request. Arbitration will
switch to PEG VC0 VT-d fetch request if the grant count
corresponding to PEG VC0 VT-d fetch is greater than zero and
the VT-d fetch request corresponding to PEG VC0 stream is
available.
DMI VC0 VT-d Fetch Grant Count (DMIVC0GNTCNT)
The arbiter will continue to grant DMI VC0 VT-d fetch as long
as the grant count value in this field is greater than zero and
there is no higher priority VT-d fetch requests. Arbitration will
switch to DMI VCp or PEG VC0 VT-d fetch requests if the grant
count corresponding to those VT-d fetch is greater than zero
and the VT-d fetch requests corresponding to those streams
are available.
0/0/0/VC0PREMAP
F04-F07h
0000FFFFh
RW-L
32 bits
Description
297

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