TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 121

• Manufacturer Part Number: TX4939XBG-400
• Manufacturer: Toshiba

Specifications of TX4939XBG-400

• Cpu Core: TX49/H4 90nm
• Clock Mhz/max Mips: 400/520
• Inst./data Cache: 32KB (4 Way)/32KB (4 Way)
• Tlb: x
• 1cycle Mac: x
• Volts (v): 1.25/2.5/3.3
• Peripherals: DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
• Companion Chip: TC86C001FG
• Package: PGBA456

Address
6.6.1. Registers for ATA0
All registers below are mapped into ATA100 CORE registers one by one, except the DMA Command register is mapped to
ATA100 CORE register, Start register and Direction Control register. Use byte, half-word, or word load/store to access
register with 8, 16, or 32 bits word, respectively
ATA0
0x3000
0x3001
0x3002
0x3003
0x3004
0x3005
0x3006
0x3007
0x3402
0x3800
0x3802
0x3804
0x3c00
0x3c02
0x3c08
0x3c0a
0x3c10
0x3c18
0x3c20
0x3c28
0x3c30
0x3c38
0x3c88
0x3c90
0x3c98
0x3cb8
0x3cc0
0x3cc8
0x3cd0
0x3cd8
0x3ce0
Rev. 3.1 November 1, 2005
LE
Offset Address
0x3006
0x3006
0x3005
0x3004
0x3003
0x3002
0x3000
0x3405
0x3807
0x3805
0x3800
0x3c06
0x3c04
0x3c0e
0x3c0c
0x3c16
0x3c1e
0x3c26
0x3c2e
0x3c36
0x3c3e
0x3c8e
0x3c96
0x3c9e
0x3cbe
0x3cc6
0x3cce
0x3cd6
0x3cde
0x3ce6
0x3001
BE
16
8
8
8
8
8
8
8
8
8
8
32
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
Register Size
(bit)
Table 6-9 Internal Registers for ATA0
ATA0_DATA
ATA0_Error_Ft
ATA0_St_Cmd
ATA0_Alt_DevCtl
ATA0_DMA_Cmd
ATA0_DMA_stat
ATA0_PRD_Ptr
ATA0_Sys_Ctl_1
ATA0_Sys_Ctl_2
ATA0_Xfer_Cnt_1
ATA0_Xfer_Cnt_2
ATA0_Sec_Cnt
ATA0_Strt_AddL
ATA0_Strt_AddU
ATA0_Add_Ctl
ATA0_Lo_BCnt
ATA0_Up_BCnt
ATA0_H_Rst_Tim
ATA0_int_ctl
ATA0_Pkt_Cmd
ATA0_Bxfer_cntH
ATA0_Bxfer_cntL
ATA0_Dev_TErr
ATA0_Pkt_xfer_ct
ATA0_Strt_AddT
Register Symbol
ATA0_Sec
ATA0_LBA0
ATA0_LBA1
ATA0_LBA2
ATA0_Device
ATA0_PIO_Acc
6-11
DATA register ATA0 device
Error/Feature ATA0 device
Sector Count ATA0 device
LBA Low ATA0 device
LBA Mid ATA0 device
LBA High ATA0 device
Device register ATA0 device
Status/Command ATA0 device
Alternate Status/Device Control ATA0 device
DMA command for ATA0
DMA Status for ATA0
PRD Table Pointer for ATA0
System Control 1 for ATA0
System Control 2 for ATA0
Transfer Word Count 1 for ATA0
Transfer Word Count 2 for ATA0
Sector Count for ATA0
Transfer Start Low Address for ATA0
Transfer Start Upper Address for ATA0
Additional Control for ATA0
Lower Burst Count for ATA0
Upper Burst Count for ATA0
PIO Access Address for ATA0
Host Reset Timer for ATA0
Interrupt Control for ATA0
ATAPI Packet Command for ATA0
Bus Transfer Count High for ATA0
Bus Transfer Count Low for ATA0
Device Timing Error for ATA0
Packet Transfer Control for ATA0
Transfer Start Top Address for ATA0
Register Name
Toshiba RISC Processor
TX4939
6
6