TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 457

• Manufacturer Part Number: TX4939XBG-400
• Manufacturer: Toshiba

Specifications of TX4939XBG-400

• Cpu Core: TX49/H4 90nm
• Clock Mhz/max Mips: 400/520
• Inst./data Cache: 32KB (4 Way)/32KB (4 Way)
• Tlb: x
• 1cycle Mac: x
• Volts (v): 1.25/2.5/3.3
• Peripherals: DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
• Companion Chip: TC86C001FG
• Package: PGBA456

ATA100
17.3. Register List
17.3.1. Register address map
Use byte, half-word, or word load/store to access register with 8, 16, or 32 bits word, respectively
Rev. 3.1 November 1, 2005
ATA0/1
000
001
001
002
003
004
005
006
007
007
400
402
402
403
800
801
802
803
804
808
80C
c00
c08
c0a
c10
c18
c20
c28
c30
c38
c88
c90
c98
cb8
cc0
cc8
cd0
cd8
ce0
LE
Address
Gbus
006
006
006
005
004
003
002
001
000
000
406
405
405
404
807
806
805
804
800
80C
808
c06
c0e
c0c
c16
c1e
c26
c2e
c36
c3e
c8e
c96
c9e
cbe
cc6
cce
cd6
cde
ce6
BE
16
8
8
8
8
8
8
8
8
8
16
8
8
8
8
8
8
8
32
32
32
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
Width
(bit)
R/W
R
W
R/W
R/W
R/W
R/W
R/W
R
W
N/A
R
W
N/A
R/W
N/A
R/W
N/A
R/W
N/A
N/A
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
WO
RO
RO
R/W
R/W
R/W
Access
Type
DATA
Error
Feature
Sector Count
LBA0
LBA1
LBA2
Device/Head
Status
Command
Reserved
Alt Statusl
Device Control
Reserved
DMA Command
Reserved
DMA Status
Reserved
PRD table Ptr
Reserved
Reserved
Sys Control
Xfer Word Cnt 1
Xfer Word Cnt 2
Sector Cnt
Xfer Start Lower Address
Xfer Start Upper Address
Additional Control
Lower Burst Counter
Upper Burst Count
PIO Access Address
Host Reset Timer
Interrupt Control
ATAPI Packet Command
Bus Xfer Count High
Bus Xfer Count Low
ATA Device Timing Error
Packet Xfer Control
Xfer Start Top Address
17-3
Register Name
ATA100 Core/ATA Shadow register *3
ATA100 Core/ATA Shadow register
ATA100 Core/ATA Shadow register
ATA100 Core/ATA Shadow register
ATA100 Core
ATA100 Core
ATA100 Core
ATA100 Core
ATA100 Core
ATA100 Core
ATA100 Core
ATA100 Core
ATA100 Core
ATA100 Core
ATA100 Core
ATA100 Core
ATA100 Core
ATA100 Core/ATA Shadow register *1
ATA100 Core/ATA Shadow register *1
ATA100 Core/ATA Shadow register *1
ATA100 Core/ATA Shadow register
ATA100 Core/ATA Shadow register
ATA100 Core/ATA Shadow register
ATA100 Core/ATA Shadow register
ATA100 Core/ATA Shadow register
N/A writes ignored
N/A writes ignored
Slave mapping/Mapped to ATA100
Core*4
N/A writes ignored
Slave mapping *4
N/A writes ignored
Slave mapping
N/A writes ignored
N/A writes ignored
Slave mapping*3,*5/Mapped to ATA100
Core
Slave mapping*6/Mapped to ATA100
Core
Slave mapping*6/Mapped to ATA100
Core
ATA100 Core
ATA100 Core
Toshiba RISC Processor
Location/Comments
TX4939
17
17