TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 295

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TX4939XBG-400

Manufacturer Part Number
TX4939XBG-400
Description
Manufacturer
Toshiba
Datasheet

Specifications of TX4939XBG-400

Cpu Core
TX49/H4 90nm
Clock Mhz/max Mips
400/520
Inst./data Cache
32KB (4 Way)/32KB (4 Way)
Tlb
x
1cycle Mac
x
Volts (v)
1.25/2.5/3.3
Peripherals
DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
Companion Chip
TC86C001FG
Package
PGBA456

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DMA
14.3.5. Memory-Memory Copy Mode
It is possible to copy memory from any particular address to any other particular address when in the Memory-Memory
Copy mode.
Set the DMA Channel Control Register (DMCCRn) as follows.
DMCCRn.EXTRQ = 0: Memory Transfer mode
DMCCRn.SNGAD = 0: Dual Address mode
Furthermore, when in the Memory-Memory Copy mode it is possible to set the interval for requesting ownership of each
bus using the Internal Request Delay field (INTRQD) of the DMA Channel Control Register (DMCCRn).
Refer to “14.3.8 Dual Address Transfer” for information regarding the setting of other registers.
14.3.6. Memory Fill Transfer Mode
When in the Memory Fill Transfer mode, double word data set in the DMA Memory Fill Data Register (DMMFDR) is written
to the data region specified by the DMA Source Address Register (DMSARn). This data can be used for initializing the
memory, etc.
Set the DMA Channel Control Register (DMCCRn) as follows.
In addition, when in the Memory Fill Transfer mode, it is possible to set the interval for requesting ownership of each bus
using the Internal Request Delay field (INTRQD) of the DMA Channel Control Register (DMCCRn).
Refer to “14.3.7 Single Address Transfer” for information regarding the setting of other registers.
By using this function together with the memory Write function that writes to multiple SDRAM Controller memory channels
simultaneously (refer to Section 9.3.4), it is possible to initialize memory even more efficiently.
Rev. 3.1 November 1, 2005
□ DMCCRn.EXTRQ
□ DMCCRn.SNGAD
□ DMCCRn.MEMIO
=
=
=
0: Transfer from I/O to memory
0: Memory transfer mode
1: Single Address Transfer
14-7
Toshiba RISC Processor
TX4939
14
14

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