MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 103

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Freescale Semiconductor
31–12
11–8
Bits
7–4
7
6
5
Name
PAVx
OMC
S/U
F/I
—
Reserved, should be cleared.
Product/accumulation overflow flags. Contains four flags, one per accumulator, that
indicate if past MAC or MSAC instructions generated an overflow during product calculation
or the 48-bit accumulation. When a MAC or MSAC instruction is executed, the PAVx flag
associated with the destination accumulator is used to form the general overflow flag,
MACSR[V]. Once set, each flag remains set until V is cleared by a MOV.L , MACSR
instruction or the accumulator is loaded directly.
Overflow/saturation mode. Used to enable or disable saturation mode on overflow. If set,
the accumulator is set to the appropriate constant on any operation which overflows the
accumulator. Once saturated, the accumulator remains unaffected by any other MAC or
MSAC instructions until either the overflow bit is cleared or the accumulator is directly
loaded.
Signed/unsigned operations.
In integer mode:
S/U determines whether operations performed are signed or unsigned. It also determines
the accumulator value during saturation, if enabled.
0 Signed numbers. On overflow, if OMC is enabled, an accumulator saturates to the most
1 Unsigned numbers. On overflow, if OMC is enabled, an accumulator saturates to the
In fractional mode:
S/U controls rounding while storing an accumulator to a general-purpose register.
0 Move accumulator without rounding to a 16-bit value. Accumulator is moved to a
1 The accumulator is rounded to a 16-bit value using the round-to-nearest (even) method
Fractional/integer mode Determines whether input operands are treated as fractions or
integers.
0 Integers can be represented in either signed or unsigned notation, depending on the
1 Fractions are represented in signed, fixed-point, two’s complement notation. Values
positive (0x7FFF_FFFF) or the most negative (0x8000_0000) number, depending on
both the instruction and the value of the product that overflowed.
smallest value (0x0000_0000) or the largest value (0xFFFF_FFFF), depending on the
instruction.
general-purpose register as a 32-bit value.
when it is moved to a general-purpose register. See
resulting 16-bit value is stored in the lower word of the destination register. The upper
word is zero-filled. The accumulator value is not affected by this rounding procedure.
value of S/U.
range from -1 to 1- 2
Section 4.5.2, “Data
Table 4-1. MACSR Field Descriptions
MCF5271 Reference Manual, Rev. 2
-15
Representation."
Operational Mode Fields
for 16-bit fractions and -1 to 1 - 2
Description
Section 4.4.1.1.1,
-31
for 32-bit fractions. See
Memory Map/Register Definition
“Rounding.” The
4-7