MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 528

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Symmetric Key Hardware Accelerator (SKHA)
28.2.1.4 SKHA Status Register (SKSR)
The SKSR is read-only and reflects the current state of the SKHA. It also contains the internal state
values of the DES and AES state machines for the purposes of debugging. A write to this register
has no effect.
28-10
Address
Reset
Reset
31–24
23–16
Bits
15–11
10–8
Bits
7–5
2
1
0
W
W
R
R
31
15
0
0
Name
SWR
CI
RI
AESES
DESES
Name
30
14
0
0
OFL
IFL
—
AESES
Table 28-4. SKCMR Field Descriptions (Continued)
29
13
Clear Interrupt Request. Clears errors in the SKHA error status registers and deasserts any
pending interrupt request to the interrupt controller. This bit is self resetting.
0 Do not clear interrupts & errors
1 Clear interrupt requests & errors
Reinitialize. Reinitializes memory and clears all registers except SKHA Error Status Mask and
Control registers. This bit is self clearing.
0 No Reinitialization
1 Reinitialize SKHA module
Software Reset. Functionally equivalent to a hardware resert. All registers are reset and
FIFOs are cleared. This bit is self clearing.
0 No reset
1 Perform software reset
0
0
Figure 28-11. SKHA Status Register (SKSR)
Output FIFO level. This 8-bit value indicates the number of data words in the Output FIFO.
Input FIFO level. This 8-bit value indicates the number data words in the Input FIFO.
AES engine state. Current value of AES engine state machine (Debug only)
DES engine state. Current value of DES engine state machine (Debug only)
Reserved.
28
12
0
0
OFL
Table 28-5. SKSR Field Descriptions
27
11
0
0
MCF5271 Reference Manual, Rev. 2
26
10
0
0
DESES
25
0
0
9
IPSBAR + 0x1B_000C
24
0
8
0
Description
23
0
0
0
7
Description
22
0
6
0
0
21
0
0
0
5
BUSY
20
0
4
0
IFL
RD
19
0
0
3
Freescale Semiconductor
ERR DONE INT
18
0
0
2
17
0
0
1
16
0
0
0