MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 498

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MCF5270CAB100

Manufacturer Part Number
MCF5270CAB100
Description
MCU V2 COLDFIRE 64K SRAM 160-QFP
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Datasheets

Specifications of MCF5270CAB100

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
100MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, WDT
Number Of I /o
39
Program Memory Type
ROMless
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
160-QFP
Processor Series
MCF527x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

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Part Number
Manufacturer
Quantity
Price
Part Number:
MCF5270CAB100
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Message Digest Hardware Accelerator (MDHA)
26.2.1.1 Invalid Modes
The following mode combinations will trigger an interrupt to the interrupt controller and set the
mode error bit in the MDHA interrupt status register.
26.2.2
The MDCR contains bits that should be set following a hardware reset.
26-6
MDHA Control Register (MDCR)
(EHMAC)
(EHMAC)
(EHMAC)
SWAP=1
OPAD=1
MAC=10
MAC=10
MAC=10
MAC=01
MAC=01
(HMAC)
(HMAC)
IPAD=1
IPAD=1
Setting any reserved bits.
SSL=1
MDMR bit settings
PDATA=1
PDATA=1
OPAD=1
OPAD=1
(SHA-1)
IPAD=1
ALG=1
ALG=0
ALG=1
Table 26-3. Invalid MDMR Bit Settings
(MD5)
OPAD
(MD5)
IPAD
MCF5271 Reference Manual, Rev. 2
Asserting both of the signals at the same time causes a mode to
occur that the MDHA is not capable of performing. These two
modes must be performed separately.
According to HMAC and EHMAC standards no padding is done
to the data when the IPAD function is performed.
According to HMAC and EHMAC standards no padding is done
to the data when the OPAD function is performed.
MDHA requires that the IPAD step be performed as a separate
hash operation than message authentication.
MDHA requires that the OPAD step be performed as a separate
hash operation than message authentication.
The standard for EHMAC is only defined for the SHA-1
algorithm.
MDHA requires that the IPAD step be performed as a separate
hash operation than message authentication.
MDHA requires that the OPAD step be performed as a separate
hash operation than message authentication.
SSL MAC is only functional for the MD5 algorithm.
The SWAP bit is designed to support a particular function for the
SHA-1 algorithm and is invalid for MD5.
Comments
Freescale Semiconductor

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