MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 90

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

ColdFire Core
3.11 Miscellaneous Instruction Execution Times
3.12 EMAC Instruction Execution Times
3-24
1
2
3
4
5
movem.l
movem.l
Opcode
n is the number of registers moved by the MOVEM opcode.
If a MOVE.W #imm,SR instruction is executed and imm[13] = 1, the execution time is 1(0/0).
The execution time for STOP is the time required until the processor begins sampling continuously for interrupts.
PEA execution times are the same for (d16,PC).
wdebug
move.w
move.w
move.w
move.w
wddata
PEA execution times are the same for (d8,PC,Xn*SF).
trapf.w
movec
link.w
trapf.l
pulse
trapf
stop
unlk
nop
pea
trap
Opcode
muls.w
mulu.w
<ea>,&list
&list,<ea>
<ea>,CC
<ea>,SR
Ay,#imm
CCR,Dx
SR,Dx
Ry,Rc
<EA>
#imm
#imm
<ea>
<ea>
<ea>
Ax
R
<ea>y, Dx
<ea>y, Dx
<EA>
Table 3-17. Miscellaneous Instruction Execution Times
2(0/1)
1(0/0)
1(0/0)
1(0/0)
7(0/0)
9(0/1)
3(0/0)
1(0/0)
1(0/0)
1(0/0)
1(0/0)
2(1/0)
Rn
—
—
—
—
—
—
—
Table 3-18. EMAC Instruction Execution Times
4(0/0)
4(0/0)
1+n(n/0)
1+n(0/n)
Rn
2(0/1)
3(1/0)
5(2/0)
(An)
—
—
—
—
—
—
—
—
—
—
—
—
—
—
MCF5271 Reference Manual, Rev. 2
6(1/0)
6(1/0)
(An)
(An)+
3(1/0)
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
6(1/0)
6(1/0)
(An)+
3(1/0)
-(An)
Effective Address
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Effective Address
6(1/0)
6(1/0)
-(An)
(d16,An)
1+n(n/0)
1+n(0/n)
2(0/1)
3(1/0)
5(2/0)
—
—
—
—
—
—
—
—
—
—
—
—
—
—
(d16,An)
6(1/0)
6(1/0)
4
(d8,An,Xn*SF
3(0/1)
4(1/0)
(d8,An,X
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
n*SF)
7(1/0)
7(1/0)
)
5
Freescale Semiconductor
xxx.wl
6(1/0)
6(1/0)
xxx.wl
2(0/1)
3(1/0)
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
4(1/0)
4(1/0)
#xxx
7(0/0)
3(0/0)
15(1/2)
1(0/0)
3(1/0)
#xxx
—
—
—
—
—
—
—
—
—
—
—
—
—
—
2
3