MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 545

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Functional Description
29.4 Functional Description
29.4.1 JTAG Module
The JTAG module consists of a TAP controller state machine, which is responsible for generating
all control signals that execute the JTAG instructions and read/write data registers.
29.4.2 TAP Controller
The TAP controller is a state machine that changes state based on the sequence of logical values
on the TMS pin.
Figure 29-4
shows the machine’s states. The value shown next to each state is the
value of the TMS signal sampled on the rising edge of the TCLK signal.
Asserting the TRST signal asynchronously resets the TAP controller to the test-logic-reset state.
As
Figure 29-4
shows, holding TMS at logic 1 while clocking TCLK through at least five rising
edges also causes the state machine to enter the test-logic-reset state, whatever the initial state.
MCF5271 Reference Manual, Rev. 2
Freescale Semiconductor
29-7