MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 150

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MCF5270CAB100

Manufacturer Part Number
MCF5270CAB100
Description
MCU V2 COLDFIRE 64K SRAM 160-QFP
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Datasheets

Specifications of MCF5270CAB100

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
100MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, WDT
Number Of I /o
39
Program Memory Type
ROMless
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
160-QFP
Processor Series
MCF527x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF5270CAB100
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Clock Module
7.4.4
Frequency modulation is useful for spreading the energy over a broader frequency spectrum in
order to reduce EMI.
In normal PLL clock mode, the default synthesis mode is without frequency modulation enabled.
When frequency modulation (FM) is enabled three parameters must be set to generate the desired
level of modulation: the RATE, DEPTH, and EXP bit fields of the SYNCR. RATE and DEPTH
determine the modulation rate and the modulation depth. The EXP field controls the FM
calibration routine described in
equation that shows how to obtain the values to be programmed for EXP is as follows (see
Section 7.4.5, “Frequency Modulation Depth Calibration,”
Figure 7-6
modulation hardware. The modulation waveform is always a triangle wave and its shape is not
programmable.
Note, the modulation rates given are specific to a reference frequency of 8 MHz.
where Q = {40,80} giving modulation rates of 200 kHz, and 100 kHz. Therefore, the utilization of
a non 8 MHz reference will result in scaled modulation rates.
The following steps should be used for proper programming of the frequency modulation mode.
These steps ensure proper operation of the calibration routine and prevent frequency overshoot
from the sequence.
7-16
5. Monitor the LOCK flag in SYNSR. When the PLL achieves lock, write the RFD value
6. If frequency modulation was enabled initially, it can be re-enabled following the steps
1. Determine the appropriate value for the EXP field, based upon the selected MFD and
2. Disable modulation by clearing the DEPTH field in the SYNCR.
3. Monitor LOCK bit. Do not proceed until the PLL is locked in non-modulation mode.
from step 1 to the RFD field of the SYNCR. This changes the system clocks frequency to
the required frequency.
listed in
desired depth, in the synthesizer control register (SYNCR), as shown in the equation above.
Write this value to the EXP field of the SYNCR. The MFD should be programmed to the
appropriate value prior to Step 2.
Programming the Frequency Modulation
illustrates the affects of the parameters and the modulation waveform built into the
Keep the maximum system clock frequency below the limit given in
the Electrical Characteristics.
Section 7.4.4, “Programming the Frequency Modulation.”
Section 7.4.5, “Frequency Modulation Depth Calibration.”
MCF5271 Reference Manual, Rev. 2
EXP
=
(
------------------------------------------------------- -
2× MFD
NOTE
(
100
+
2
)×M×P
for details):
)
Freescale Semiconductor
F
mod
=
F
ref
The
Q

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