MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 406

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Programmable Interrupt Timer Modules (PIT0–PIT3)
21.3
This section describes the PIT functional operation.
21.3.1 Set-and-Forget Timer Operation
This mode of operation is selected when the RLD bit in the PCSR register is set.
When the PIT counter reaches a count of 0x0000, the PIF flag is set in PCSRn. The value in the
modulus register is loaded into the counter, and the counter begins decrementing toward 0x0000.
If the PCSRn[PIE] bit is set, the PIF flag issues an interrupt request to the CPU.
When the PCSRn[OVW] bit is set, the counter can be directly initialized by writing to PMRn
without having to wait for the count to reach 0x0000.
21.3.2 Free-Running Timer Operation
This mode of operation is selected when the PCSRn[RLD] bit is clear. In this mode, the counter
rolls over from 0x0000 to 0xFFFF without reloading from the modulus latch and continues to
decrement.
When the counter reaches a count of 0x0000, the PCSRn[PIF] flag is set. If the PCSRn[PIE] bit is
set, the PIF flag issues an interrupt request to the CPU.
When the PCSRn[OVW] bit is set, the counter can be directly initialized by writing to PMRn
without having to wait for the count to reach 0x0000.
21-6
PIT CLOCK
PIT CLOCK
MODULUS
COUNTER
MODULUS
COUNTER
PIF
PIF
Functional Description
Figure 21-5. Counter Reloading from the Modulus Latch
0x0002
0x0002
Figure 21-6. Counter in Free-Running Mode
MCF5271 Reference Manual, Rev. 2
0x0001
0x0001
0x0005
0x0005
0x0000
0x0000
Freescale Semiconductor
0x0005
0xFFFF