MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 410

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

DMA Timers (DTIM0–DTIM3)
22.1.2 Features
Each DMA timer module has the following features:
22.2
The following features are programmable through the timer registers, shown in
22.2.1 Prescaler
The prescaler clock input is selected from system clock (divided by 1 or 16) or from the
corresponding timer input, DTINn. DTINn is synchronized to the system clock. The
22-2
• Maximum timeout period of 234,562 seconds at 75 MHz (~5 hours)
• 13-ns resolution at 75 MHz
• Programmable sources for the clock input, including external clock
• Programmable prescaler
• Input-capture capability with programmable trigger edge on input pin
• Programmable mode for the output pin on reference compare
• Free run and restart modes
• Programmable interrupt or DMA request on input capture or reference-compare
Internal Bus Clock
To Interrupt
(÷1 or ÷16
controller
DTOUTn
DREQn
Memory Map/Register Definition
DTINn
)
31
Detection
Capture
(latches DTCN value when triggered by DTINn)
Figure 22-1. DMA Timer Block Diagram
DMA Timer Capture Register (DTCRn)
DMA Timer
Generator
MCF5271 Reference Manual, Rev. 2
Clock
7
clock
31
(indicates capture or when DTCN = DTRRn)
DMA Timer Counter Register (DTCNn)
DMA Timer Event Register (DTERn)
15
(contains incrementing value)
DMA Timer Mode Register (DTMRn)
Prescaler
Divider
0
31
(reference value for comparison with DTCN)
DMA Timer Reference Register (DTRRn)
Mode Bits
0
0
0
7
DMA Timer Extended Mode
Register (DTXMRn)
Freescale Semiconductor
Table
22-1:
0
0