MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 145

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

7.3.1.2
In the SYNSR, only the LOLF and LOCF flag bits are writeable. Writes to bits other than LOLF
and LOCF have no effect.
Freescale Semiconductor
Address
Reset
Reset
W
W
R
R
31–10
Bits
1
2
9
8
31
15
0
0
Reset state determined during reset configuration
Reset state determined during reset
Synthesizer Status Register (SYNSR)
30
14
0
0
Name
LOLF
LOC
—
29
13
0
0
—
Figure 7-5. Synthesizer Status Register (SYNSR)
28
12
Reserved
Loss-of-lock flag. This bit provides the interrupt request flag. To clear the flag, write a 1 to
this bit. Writing 0 has no effect.
This flag will not be set and an interrupt will not be requested under any one of the following
conditions: (1) loss-of-lock caused by system reset, (2) writing to the SYNCR to modify the
MFD bits, or (3) enabling frequency modulation. The only way to clear this flag is to reset
the part or write a 1 to this bit.
0 Interrupt service not requested
1 Interrupt service requested
Loss-of-clock status. This bit is an indication of whether a loss-of-clock condition is present
when operating in normal and 1:1 PLL modes. If LOC = 0, the system clocks are operating
normally. If LOC = 1, the system clocks have failed due to a reference failure or a PLL
failure. If the read of the LOC bit and the loss-of-clock condition occur simultaneously, the
bit does not reflect the current loss-of-clock condition. If a loss-of-clock condition occurs
which sets this bit and the clocks later return to normal, this bit will be cleared.
A loss-of-clock condition can only be detected if LOCEN = 1. See
Operation During Reset.”
Note: LOC is always cleared in external clock mode.
0 Clocks are operating normally
1 Clocks are not operating normally.
0
0
Table 7-6. SYNSR Field Descriptions
27
11
0
0
MCF5271 Reference Manual, Rev. 2
26
10
0
0
LOLF LOC MODE
25
0
0
9
IPSBAR + 0x0012_0004
24
0
0
8
—
23
0
7
Description
1
SEL
PLL
See Note 1
22
0
6
1
REF
PLL
21
0
5
1
LOCKS
20
0
4
1
Memory Map/Register Definition
LOCK
Note 2
See
Section 7.4.2, “Clock
19
0
3
2
LOCF CAL
18
0
2
0
DONE
17
0
0
1
PASS
CAL
16
0
0
7-11
0