MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 132

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Static RAM (SRAM)
6.2.2
After a hardware reset, the contents of the SRAM module are undefined. The valid bit of the
RAMBAR is cleared, disabling the module. If the SRAM requires initialization with instructions
or data, the following steps should be performed:
The ColdFire processor or an external emulator using the debug module can perform these
initialization functions.
6.2.3
The following code segment describes how to initialize the SRAM. The code sets the base address
of the SRAM at 0x2000_0000 and then initializes the SRAM to zeros.
RAMBASE
RAMVALID
move.l
movec.l
The following loop initializes the entire SRAM to zero
lea.l
move.l
SRAM_INIT_LOOP:
clr.l
subq.l
bne.b
6-4
1. Load the RAMBAR mapping the SRAM module to the desired location within the address
2. Read the source data and write it to the SRAM. There are various instructions to support
3. After the data has been loaded into the SRAM, it may be appropriate to load a revised
space.
this function, including memory-to-memory move instructions, or the MOVEM opcode.
The MOVEM instruction is optimized to generate line-sized burst fetches on 0-modulo-16
addresses, so this opcode generally provides maximum performance.
value into the RAMBAR with a new set of attributes. These attributes consist of the
write-protect and address space mask fields.
SRAM Initialization
SRAM Initialization Code
EQU $20000000
EQU $00000001
#RAMBASE+RAMVALID,D0
D0, RAMBAR
RAMBASE,A0
#16384,D0
(A0)+
#1,D0
SRAM_INIT_LOOP
MCF5271 Reference Manual, Rev. 2
;set this variable to $20000000
;load RAMBASE + valid bit into D0.
;load RAMBAR and enable SRAM
;load pointer to SRAM
;load loop counter into D0
;clear 4 bytes of SRAM
;decrement loop counter
;if done, then exit; else continue looping
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