MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 224

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MCF5270CAB100

Manufacturer Part Number
MCF5270CAB100
Description
MCU V2 COLDFIRE 64K SRAM 160-QFP
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Datasheets

Specifications of MCF5270CAB100

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
100MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, WDT
Number Of I /o
39
Program Memory Type
ROMless
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
160-QFP
Processor Series
MCF527x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF5270CAB100
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
General Purpose I/O Module
Refer to the
other pins not controlled by the ports module. The function of most of the pins (primary function,
GPIO, etc.) is determined by the ports module pin assignment registers. Refer to
“Signal Primary Functions”
It should be noted from
more than one pin. While it is possible to enable the function on more than one pin simultaneously,
this type of programming should be avoided for input functions to prevent unexpected behavior.
All multiple-pin functions are listed in
12-8
Table 12-1. MCF5270 and MCF5271 Signal Information and Muxing (Continued)
SDRAM Chip select 1(SD_CS1)
1
2
Signal Name
PLL_TEST
Refers to pin’s primary function. All pins which are configurable for GPIO have a pullup enabled
in GPIO mode with the exception of PBUSCTL[7], PBUSCTL[4:0], PADDR, PBS, PSDRAM.
If JTAG_EN is asserted, these pins default to Alternate 1 (JTAG) functionality. The GPIO module
is not responsible for assigning these pins.
Chapter 2, “Signal
VDDPLL
VSSPLL
Chip select 6 (CS6)
Chip select 5 (CS5)
Chip select 4 (CS4)
OVDD
TEST
VDD
VSS
Function
Table 12-2. MCF5271 Multiple-Pin Functions
Table 12-2
GPIO
for detailed descriptions of pin functions.
Descriptions,” for more detailed descriptions of these pins and
MCF5271 Reference Manual, Rev. 2
Alternate 1
that there are several cases where a function is available on
Table
Direction
Power Supplies
O
O
O
O
12-2.
Alternate
Test
2
Dir.
1
I
I
I
I
I
I
I
55, 69, 81, 94,
17, 31, 40, 54,
67, 80, 88, 93,
105, 114, 128,
104, 113, 127,
137, 144, 160
1, 18, 32, 41,
16, 53, 103
MCF5270
MCF5271
160 QFP
138, 145
Associated Pins
19
87
84
CS3, SD_CS1
CS6, A23
CS5, A22
CS4, A21
E5, E7, E10, F7,
A1, A14, E6, E9,
F6, F8, F10, G7,
F9, G6, G8, H7,
J10, K5, K6, K8
J9, K7, P1, P14
D6, F11, G4, L4
H8, H9, J6, J8,
G9, H6, J5, J7,
196 MAPBGA
MCF5270
MCF5271
M13
Freescale Semiconductor
L14
F5
Section 2.3,

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