MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 182

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Chip Configuration Module (CCM)
9-6
15–10
Bits
9–8
7–6
4–3
2–1
5
0
BOOTPS
RLOAD
MODE
RCSC
Name
—
—
—
Reserved, should be cleared.
Chip select configuration. Reflects the default chip select configuration. The default
function of the chip select configuration can be overridden during reset configuration.
Reserved, should be cleared.
Pad driver load. Reflects the default pad driver strength configuration.
0 Partial drive strength (This is the default value used for the MCF5271.)
1 Full drive strength
Boot port size. Reflects the default selection for the boot port size. The below table shows
the different port configurations for BOOTPS. The default function of the boot port size can
be overridden during reset configuration.
Reserved, should be cleared.
Chip configuration mode. Reflects the default chip configuration mode.
0 Reserved
1 Master mode (This is the only value available for the MCF5271.)
The default mode cannot be overridden during reset configuration.
Table 9-5. RCON Field Descriptions
1
1
This is the default value used for the MCF5271.
This is the default value used for the MCF5271.
MCF5271 Reference Manual, Rev. 2
BOOTPS[1:0]
00
RCSC
00
1
01
10
01
10
11
, 11
1
Description
PADDR[7:5] = A[23:21]
PADDR[7] = CS6
PADDR[6:5] = A[22:21]
PADDR[7:6] = CS[6:5]
PADDR[5] = A[21]
PADDR[7:5] = CS[6:4]
Chip Select Configuration
Boot Port Size
External 32 bits
External 16 bits
External 8 bits
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