MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 241

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

12.3.1.5.8 QSPI Pin Assignment Register (PAR_QSPI)
The PAR_QSPI register controls the functions of the QSPI pins.
Freescale Semiconductor
Bits
7–6
11–4
Bits
5
13
12
PAR_U2RXD U2RXD pin assignment. This bit configures the U2RXD pin for its primary function or
PAR_U1RXD
PAR_CS1
PAR_CS0
PAR_U2TXD U2TXD pin assignment. This bit configures the U2TXD pin for its primary function or
PAR_U1CTS
PAR_U1RTS
PAR_U1TXD
Figure 12-37. QSPI Pin Assignment Register (PAR_QSPI)
Address
Name
Table 12-15. PAR_UART Field Descriptions (Continued)
Name
Reset
W
R
Table 12-16. PAR_QSPI Field Descriptions
QSPI_CS1 pin assignment. This field configures the QSPI_CS1 pin for one of its primary
functions or GPIO.
0x QSPI_CS1 pin configured for GPIO
10 QSPI_CS1 pin configured for SDRAMC SCKE function
11 QSPI_CS1 pin configured for QSPI CS1 function
QSPI_CS0 pin assignment. This bit configures the QSPI_CS0 pin for its primary function
or GPIO.
0 QSPI_PSC0 pin configured for GPIO
1 QSPI_PSC0 pin configured for QSPI CS0 function
0
7
PAR_CS1
GPIO.
0 U2RXD pin configured for GPIO
1 U2RXD pin configured for UART2 receive data function
GPIO.
0 U2TXD pin configured for GPIO
1 U2TXD pin configured for UART2 transmit data function
UART 1 pin assignment. These bit fields configure the U1RXD, U1TXD, U1CTS, and
U1RTS pins for one of their primary functions or GPIO.
MCF5271 Reference Manual, Rev. 2
0
6
00
01
10
11
PAR_
CS0
0
PAR_U1RXD PAR_U1TXD PAR_U1CTS
5
Reserved
U1RXD
IPSBAR + 0x10_004A
GPIO
GPIO
0
4
PAR_DIN
Reserved
Description
0
3
U1TXD
Description
GPIO
GPIO
DOUT
PAR_
2
0
U2CTS
U1CTS
GPIO
GPIO
PAR_SCK
0
1
Memory Map/Register Definition
0
0
PAR_U1RT
U2RTS
U1RTS
GPIO
GPIO
S
12-25