MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 594

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Debug Support
Exception ProcessingPST = 0xC,
The initial references at address 0 and 4 are never captured nor displayed since these accesses are
treated as instruction fetches.
For all types of exception processing, the PST = 0xC value is driven at all times, unless the PST
output is needed for one of the optional marker values or for the taken branch indicator (0x5).
Table 30-24
30.7.2 Supervisor Instruction Set
The supervisor instruction set has complete access to the user mode instructions plus the opcodes
shown below. The PST/DDATA specification for these opcodes is shown in
30-44
Instruction
msac.w
msac.w
move.l
move.l
move.l
move.l
move.l
move.l
move.l
move.l
move.l
move.l
move.l
move.l
mac.w
mac.w
msac.l
msac.l
mac.l
mac.l
PST = 0x5,{PST = [0x9AB],DD = target} // handler PC
shows the PST/DDATA specification for multiply-accumulate instructions.
Table 30-24. PST/DDATA Specification for MAC Instructions
Ry,Rx,<ea>,Rw,Accx PST = 0x1, {PST = 0xB, DD = source operand}
Ry,Rx,<ea>,Rw,Accx PST = 0x1, {PST = 0xB, DD = source operand}
Ry,Rx,<ea>,Rw,Accx PST = 0x1, {PST = 0xB, DD = source operand}
RyRx,<ea>,Rw,Accx PST = 0x1, {PST = 0xB, DD = source operand}
Operand Syntax
<ea>y,Accext01
<ea>y,Accext23
MACSR,CCR
<ea>y,MACR
<ea>y,MASK
Accext01,Rx
Accext23,Rx
<ea>y,Accx
Ry,Rx,Accx
Ry,Rx,Accx
MACSR,Rx
Ry,Rx,Accx
Ry,Rx,Accx
Accy,Accx
MASK,Rx
Accy,Rx
MCF5271 Reference Manual, Rev. 2
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1
PST/DDATA
Table
Freescale Semiconductor
30-25.