MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 317

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Figure 17-17
Figure 17-18
while determining that a line is being transferred. The external device uses fast termination to end
each subsequent transfer.
17.6 Secondary Wait State Operation
Refer to
of the secondary wait state operation.
Freescale Semiconductor
TSIZ[1:0]
CLKOUT
R/W, TIP
OE, BSn
CSn, OE, BSn
A[31:0]
D[31:0]
CSn
TSIZ[1:0]
TS
CLKOUT
TA
R/W, TIP
Section 16.3.2, “Enhanced Wait State Operation,”
A[31:0]
D[31:0]
TS
shows a line burst write with one wait-state insertion.
TA
shows a burst-inhibited line write. The external device executes a basic write cycle
Figure 17-17. Line Write Burst (3-2-2-2) with One Wait State
S0
S0 S1 S2 S3
S1
A[3:2] = 00
Figure 17-18. Line Write Burst-Inhibited
S2 S3 S4 S5 S0 S1 S4 S5 S0 S1 S4 S5 S0 S1 S4 S5
Basic
Line
Write
MCF5271 Reference Manual, Rev. 2
WS
Write
S4 S5
A[3:2] = 01
Fast
Write
WS
Write
S6
A[3:2] = 10
Longword
for information and timing diagrams
S7
Fast
Write
WS
Write
S8
A[3:2] = 11
Secondary Wait State Operation
S9
Fast
Write
WS
Write
S10
S11
17-15