MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 520

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MCF5270CAB100

Manufacturer Part Number
MCF5270CAB100
Description
MCU V2 COLDFIRE 64K SRAM 160-QFP
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Datasheets

Specifications of MCF5270CAB100

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
100MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, WDT
Number Of I /o
39
Program Memory Type
ROMless
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
160-QFP
Processor Series
MCF527x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF5270CAB100
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Symmetric Key Hardware Accelerator (SKHA)
In DES mode, the SKHA operates by permuting 64-bit data blocks with a shared key and an
initialization vector (IV). The SKHA supports two modes of IV operation: Electronic Code Book
(ECB) and Cipher Block Chaining (CBC).
The processor supplies data to the SKHA, and the data will be encrypted and subsequently made
available to the processor via an output FIFO. The session key is input to the block prior to
encryption.
DES is a block cipher that uses a 56-bit key (64 bits with CRC) to encrypt 64-bit blocks of data,
one block at a time. A conceptual diagram of this process is shown in
symmetric algorithm, so each of the two communicating parties share the same 64-bit key for
encryption and decryption. DES processing begins after this shared session key is agreed upon.
The text or binary message to be encrypted (typically called plaintext) is partitioned into n sets of
64-bit blocks. Each block is processed, in turn, by the DES engine, producing n sets of encrypted
(ciphertext) blocks. These blocks may be transmitted to the other entity.
Decryption is handled in the reverse manner. The ciphertext blocks are processed one at a time by
a DES module in the recipient’s system. The same key is used, and the DES block manages the
key processing internally so that the plaintext blocks are recovered.
In addition, the SKHA module can compute 3DES, which is an extension to the DES algorithm
whereby every 64-bit input block is processed three times. The SKHA supports two key (K1=K3)
or three key 3DES. A diagram of 3DES is shown in
28-2
block n
64-bit
block n-1
64-bit
Plaintext blocks
Plaintext blocks
...
block 2
64-bit
Figure 28-1. DES Encryption Process
MCF5271 Reference Manual, Rev. 2
block 1
64-bit
64-bit key
DES
Figure
block n
64-bit
28-2.
block n-1
Ciphertext blocks
64-bit
...
Figure
block 2
64-bit
Freescale Semiconductor
28-1. DES is a
block 1
64-bit

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