MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 303

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Chapter 17
External Interface Module (EIM)
17.1 Introduction
This chapter describes data-transfer operations, error conditions, and reset operations.
“SDRAM Controller
17.1.1 Features
The following list summarizes bus operation features:
17.2 Bus and Control Signals
Table 17-1
Freescale Semiconductor
• Up to 24 bits of address and 32 bits of data
• Access 8-, 16-, and 32-bit data port sizes
• Generates byte, word, longword, and line-size transfers
• Burst and burst-inhibited transfer support
• Optional internal termination for external bus cycles
• Enhanced secondary wait state
summarizes MCF5271 bus signals described in
Unless otherwise noted, in this chapter, “clock” refers to the CLKOUT
used for the bus (f
The timing diagrams within this chapter show 32 address lines,
A[31:0]. However, only the lowest 24 address signals are available
externally on the MCF5271 device, A[23:0].
Signal Name
BS[3:0]
CS[7:0]
A[23:0]
D[31:0]
OE
1
(SDRAMC),” describes DRAM cycles.
1
1
Table 17-1. ColdFire Bus Signal Summary
Address bus
Byte selects
Chip selects
Data bus
Output enable
sys/2
MCF5271 Reference Manual, Rev. 2
Description
).
NOTE
NOTE
Chapter 2, “Signal
I/O
I/O
O
O
O
O
Rising
Falling
Falling
Rising
Falling
CLKOUT Edge
Descriptions.”
Chapter 17,
17-1