MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 144

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MCF5270CAB100

Manufacturer Part Number
MCF5270CAB100
Description
MCU V2 COLDFIRE 64K SRAM 160-QFP
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Datasheets

Specifications of MCF5270CAB100

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
100MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, WDT
Number Of I /o
39
Program Memory Type
ROMless
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
160-QFP
Processor Series
MCF527x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF5270CAB100
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Clock Module
7-10
11–10
Bits
9–0
16
15
14
13
12
LOCIRQ
DISCLK
LOLIRQ
LOCRE
DEPTH
Name
RATE
EXP
Table 7-5. SYNCR Field Descriptions (Continued)
Loss-of-clock reset enable. Determines how the system handles a loss-of-clock condition.
When the LOCEN bit is clear, LOCRE has no effect. If the LOCS flag in SYNSR indicates
a loss-of-clock condition, setting the LOCRE bit causes an immediate reset. To prevent an
immediate reset, the LOCRE bit must be cleared before entering stop mode with the PLL
disabled.
0 No reset on loss-of-clock
1 Reset on loss-of-clock
Note: In external clock mode, the LOCRE bit has no effect.
Disable CLKOUT. This bit determines whether CLKOUT is active. When CLKOUT is
disabled it is driven low.
0 CLKOUT driven normally
1 CLKOUT driven low (disabled).
Loss-of-lock interrupt request. This bit determines if a loss-of-lock is ignored or if an
interrupt is requested. When operating in normal or 1:1 PLL mode, the PLL must be locked
before setting the LOLIRQ bit. Otherwise an interrupt is immediately requested.
0 Ignore loss-of-lock – no interrupt requested
1 Request interrupt on loss-of-lock
Note: In external clock mode, the LOLIRQ bit has no effect.
Loss-of-clock interrupt request. This bit determines if a loss-of-clock is ignored or if an
interrupt is requested. LOCIRQ has no effect when LOCEN is cleared. If the LOCF flag in
SYNSR indicates a loss-of-clock condition, setting (or having previously set) the LOCIRQ
bit causes an interrupt to be immediately requested.
0 Ignore loss-of-clock – no interrupt requested
1 Request interrupt on loss-of-clock
Note: In external clock mode, the LOCIRQ bit has no effect.
Modulation rate. This bit controls the rate of frequency modulation applied to the core
frequency. Changing the rate by writing to the RATE bit will initiate the FM calibration
sequence.
0 F
1 F
Note: Frequency modulation should be disabled prior to making a change to the RATE.
Frequency modulation depth and enable.This bit field controls depth and enables the
frequency modulation. When set to a value other than 0x0, the frequency modulation is
automatically enabled.
00 Modulation Depth (% of f
01 Modulation Depth (% of f
10 Modulation Depth (% of f
11 Reserved
Note: Frequency modulation should be disabled prior to making a change to the DEPTH.
Expected difference value. Writing to this field enables Frequency Modulation (FM). This
bit field holds the expected value of the difference between the reference and feedback
counters. See
to calculate this value. Entering FM calibration mode requires the user to program the EXP
field.
m
m
= F
= F
ref
ref
MCF5271 Reference Manual, Rev. 2
/ 80
/ 40
Section 7.4.5, “Frequency Modulation Depth Calibration,”
sys/2
sys/2
sys/2
) = 0
) = 1.0 ± 0.2
) = 2.0 ± 0.2
Description
Freescale Semiconductor
for details on how

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